COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,685
|
106 | 12 |
18.6M
18,679,320
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
5
|
3
|
15
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
13
|
6
|
78
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
104
|
48
|
4,992
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
112
|
49
|
5,488
|
| Saving Bytes |
113
|
7
|
791
|
| Counter |
250
|
57
|
14.2K
14,250
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
22
|
4
|
88
|
| Little Box |
575
|
12
|
6,900
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
470
|
98
|
46.0K
46,060
|
| Conditions |
49
|
8
|
392
|
| Punchcard Programming |
14.6K
14,685
|
106
|
1.55M
1,556,610
|
| Assembly Programming |
14.6K
14,685
|
106
|
1.55M
1,556,610
|
