COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
16.6K
16,628
|
115 | 1 |
1.91M
1,912,220
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
5
|
3
|
15
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
6
|
4
|
24
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
15
|
6
|
90
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
120
|
48
|
5,760
|
| Multiplexer |
153
|
50
|
7,650
|
| Saving Gracefully |
38
|
5
|
190
|
| Signed Negator |
128
|
49
|
6,272
|
| Saving Bytes |
304
|
5
|
1,520
|
| Counter |
193
|
53
|
10.2K
10,229
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
28
|
4
|
112
|
| Little Box |
1,364
|
7
|
9,548
|
| Arithmetic Logic Unit (ALU) 1 |
104
|
3
|
312
|
| Arithmetic Logic Unit (ALU) 2 |
404
|
50
|
20.2K
20,200
|
| Conditions |
55
|
8
|
440
|
| Punchcard Programming |
15.7K
15,724
|
70
|
1.10M
1,100,680
|
| Assembly Programming |
15.7K
15,724
|
70
|
1.10M
1,100,680
|
