COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,438
|
72 | 9 |
9.35M
9,355,824
|
| Mod 4 |
14.4K
14,438
|
72 | 5 |
5.19M
5,197,680
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
4
|
3
|
12
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
88
|
32
|
2,816
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
96
|
33
|
3,168
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
201
|
39
|
7,839
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
22
|
4
|
88
|
| Little Box |
416
|
7
|
2,912
|
| Arithmetic Logic Unit (ALU) 1 |
148
|
4
|
592
|
| Arithmetic Logic Unit (ALU) 2 |
470
|
66
|
31.0K
31,020
|
| Conditions |
50
|
8
|
400
|
| Punchcard Programming |
14.4K
14,438
|
72
|
1.03M
1,039,536
|
| Assembly Programming |
14.4K
14,438
|
72
|
1.03M
1,039,536
|
