Leaderboard Player projects FAQ Contact
Veratil
COMPLETE 65%

COMPLETED ARCHITECTURE LEVELS

LEVEL GATE DELAY TICK ENERGY
Circumference
14.4K 14,467
45 12
7.81M 7,812,180
Mod 4
14.4K 14,467
45 5
3.25M 3,255,075
Code Breaker
14.4K 14,467
45 1,273
828M 828,742,095
The Maze
14.4K 14,467
45 1,673
1.08B 1,089,148,095

COMPLETED LEVELS

LEVEL GATE DELAY ENERGY
NOT Gate
1
1
1
XOR Gate
3
2
6
Bigger OR Gate
2
2
4
Bigger AND Gate
2
2
4
XNOR Gate
4
3
12
Half Adder
4
2
8
Full Adder
9
4
36
Byte NOT
8
1
8
Byte NAND
8
1
8
Adding Bytes
72
18
1,296
Multiplexer
33
2
66
Saving Gracefully
10
5
50
Signed Negator
80
19
1,520
Saving Bytes
80
5
400
Counter
185
24
4,440
1 Bit Decoder
1
1
1
2 Bit Decoder
6
2
12
3 Bit Decoder
33
4
132
Little Box
468
6
2,808
Arithmetic Logic Unit (ALU) 1
148
4
592
Arithmetic Logic Unit (ALU) 2
433
38
16.4K 16,454
Conditions
61
8
488
Punchcard Programming
14.4K 14,467
45
651K 651,015
Assembly Programming
14.4K 14,467
45
651K 651,015
Byte Constant
0
0
0
Byte XOR
24
2
48
Equality
31
7
217
Unsigned Less
81
20
1,620