ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,985 | 175 |
25.0K
25,000
|
1.00 |
8.68B
8,684,375,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,497
|
72 | 77 |
80.3M
80,371,368
|
| Mod 4 |
14.5K
14,529
|
72 | 5 |
5.23M
5,230,440
|
| Code Breaker |
14.5K
14,529
|
72 | 93 |
97.2M
97,286,184
|
| The Maze |
14.5K
14,529
|
72 | 1,819 |
1.90B
1,902,834,072
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
6
|
4
|
24
|
| Bigger AND Gate |
4
|
4
|
16
|
| XNOR Gate |
5
|
4
|
20
|
| Half Adder |
6
|
3
|
18
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
32
|
2,304
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
33
|
2,640
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
185
|
38
|
7,030
|
| 1 Bit Decoder |
9
|
2
|
18
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
33
|
4
|
132
|
| Little Box |
460
|
6
|
2,760
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
385
|
66
|
25.4K
25,410
|
| Conditions |
77
|
11
|
847
|
| Punchcard Programming |
14.4K
14,497
|
72
|
1.04M
1,043,784
|
| Assembly Programming |
14.4K
14,497
|
72
|
1.04M
1,043,784
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
49
|
11
|
539
|
| Unsigned Less |
121
|
19
|
2,299
|
| Signed Less |
128
|
20
|
2,560
|
| LSR |
207
|
7
|
1,449
|
| Count leading zeroes |
224
|
24
|
5,376
|
| ASR |
215
|
9
|
1,935
|
| One-hot Encoding |
207
|
7
|
1,449
|
| Comparison Flags |
1,296
|
80
|
103K
103,680
|
| Symphony ALU |
7,093
|
130
|
922K
922,090
|
| Condition Match |
15
|
7
|
105
|
| Objective Beauty |
31
|
9
|
279
|
| Divide |
3,465
|
354
|
1.22M
1,226,610
|
| Modulo |
3,650
|
356
|
1.29M
1,299,400
|
| Multiply |
751
|
239
|
179K
179,489
|
