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huawei p40 lite
COMPLETE 55%

COMPLETED ARCHITECTURE LEVELS

LEVEL GATE DELAY TICK ENERGY
Circumference
14.2K 14,291
116 9
14.9M 14,919,804

COMPLETED LEVELS

LEVEL GATE DELAY ENERGY
NOT Gate
1
1
1
XOR Gate
5
3
15
Bigger OR Gate
3
2
6
Bigger AND Gate
3
2
6
XNOR Gate
6
4
24
Half Adder
6
3
18
Full Adder
16
6
96
Byte NOT
8
1
8
Byte NAND
8
1
8
Adding Bytes
128
48
6,144
Multiplexer
33
2
66
Saving Gracefully
10
5
50
Signed Negator
136
49
6,664
Saving Bytes
80
5
400
Counter
201
54
10.8K 10,854
1 Bit Decoder
1
1
1
3 Bit Decoder
30
4
120
Little Box
396
6
2,376
Arithmetic Logic Unit (ALU) 1
131
7
917
Arithmetic Logic Unit (ALU) 2
292
53
15.4K 15,476
Conditions
50
10
500
Punchcard Programming
14.2K 14,291
116
1.65M 1,657,756
Assembly Programming
14.2K 14,291
116
1.65M 1,657,756