COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
15.0K
15,044
|
197 | 13 |
38.5M
38,527,684
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
4
|
3
|
12
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
8
|
6
|
48
|
| Half Adder |
8
|
5
|
40
|
| Full Adder |
15
|
6
|
90
|
| Bit inverter |
5
|
3
|
15
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
272
|
80
|
21.7K
21,760
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
281
|
81
|
22.7K
22,761
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
346
|
86
|
29.7K
29,756
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
18
|
4
|
72
|
| 3 Bit Decoder |
58
|
18
|
1,044
|
| Little Box |
396
|
6
|
2,376
|
| Arithmetic Logic Unit (ALU) 1 |
136
|
5
|
680
|
| Arithmetic Logic Unit (ALU) 2 |
793
|
164
|
130K
130,052
|
| Conditions |
111
|
26
|
2,886
|
| Punchcard Programming |
15.0K
15,044
|
197
|
2.96M
2,963,668
|
| Assembly Programming |
15.0K
15,044
|
197
|
2.96M
2,963,668
|
