COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.6K
14,655
|
107 | 10 |
15.6M
15,680,850
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| XOR Gate |
4
|
3
|
12
|
| Bit inverter |
4
|
3
|
12
|
| Byte NAND |
8
|
1
|
8
|
| Counter |
201
|
38
|
7,638
|
| 3 Bit Decoder |
50
|
6
|
300
|
| Little Box |
416
|
7
|
2,912
|
| Arithmetic Logic Unit (ALU) 1 |
100
|
3
|
300
|
| Arithmetic Logic Unit (ALU) 2 |
547
|
99
|
54.1K
54,153
|
| Conditions |
79
|
8
|
632
|
| Punchcard Programming |
14.6K
14,655
|
107
|
1.56M
1,568,085
|
| Assembly Programming |
14.6K
14,655
|
107
|
1.56M
1,568,085
|
