COMPLETED ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | TICK | ENERGY |
|---|---|---|---|---|
| Circumference |
14.1K
14,140
|
120 | 9 |
15.2M
15,271,200
|
| Mod 4 |
14.1K
14,140
|
120 | 5 |
8.48M
8,484,000
|
COMPLETED LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
4
|
3
|
12
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
5
|
4
|
20
|
| Half Adder |
5
|
3
|
15
|
| Full Adder |
9
|
6
|
54
|
| Bit inverter |
4
|
3
|
12
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
|
48
|
3,456
|
| Multiplexer |
25
|
3
|
75
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
80
|
49
|
3,920
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
177
|
56
|
9,912
|
| 2 Bit Decoder |
6
|
2
|
12
|
| 3 Bit Decoder |
22
|
4
|
88
|
| Little Box |
408
|
7
|
2,856
|
| Arithmetic Logic Unit (ALU) 1 |
107
|
9
|
963
|
| Arithmetic Logic Unit (ALU) 2 |
204
|
55
|
11.2K
11,220
|
| Conditions |
35
|
14
|
490
|
| Punchcard Programming |
14.1K
14,140
|
120
|
1.69M
1,696,800
|
| Assembly Programming |
14.1K
14,140
|
120
|
1.69M
1,696,800
|
