ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.7K
14,740
|
34 |
25.0K
25,000
|
1.00 |
12.5B
12,529,000,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.3K
14,388
|
56 | 13 |
10.4M
10,474,464
|
| Mod 4 |
14.3K
14,388
|
56 | 5 |
4.02M
4,028,640
|
| Code Breaker |
14.3K
14,388
|
56 | 1,786 |
1.43B
1,439,030,208
|
| The Maze |
14.3K
14,388
|
56 | 2,446 |
1.97B
1,970,810,688
|
| Nim |
1.82B
1,828,738,728
|
96 | 8 |
1.40T
1,404,471,343,104
|
| Random Number Generator |
1.82B
1,828,739,240
|
74 | 520 |
70.3T
70,369,885,955,200
|
| Delicious order |
1.82B
1,828,739,240
|
74 | 1,812 |
245T
245,211,987,213,120
|
| Capitalize |
1.82B
1,828,739,240
|
74 | 446 |
60.3T
60,355,709,876,960
|
| Tower of Hanoi |
1.82B
1,828,739,240
|
74 | 1,007 |
136T
136,273,990,686,320
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
9
|
4
|
36
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
72
154
|
32
4
|
2,304
616
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
40
162
|
10
5
|
400
810
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
185
267
|
39
10
|
7,215
2,670
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
7
|
3
|
21
|
| 3 Bit Decoder |
16
|
3
|
48
|
| Little Box |
443
|
10
|
4,430
|
| Arithmetic Logic Unit (ALU) 1 |
179
|
7
|
1,253
|
| Arithmetic Logic Unit (ALU) 2 |
397
460
|
69
6
|
27.3K
27,393
2,760
|
| Conditions |
13
|
9
|
117
|
| Punchcard Programming |
14.4K
14,445
14.7K
14,709
|
86
44
|
1.24M
1,242,270
647K
647,196
|
| Assembly Programming |
14.4K
14,445
14.7K
14,709
|
86
44
|
1.24M
1,242,270
647K
647,196
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
60
93
|
14
8
|
840
744
|
| Signed Less |
66
125
|
16
10
|
1,056
1,250
|
| LSR |
144
|
4
|
576
|
| Count leading zeroes |
133
187
|
45
5
|
5,985
935
|
| ASR |
144
|
4
|
576
|
| One-hot Encoding |
144
|
4
|
576
|
| Comparison Flags |
686
1,093
|
64
40
|
43.9K
43,904
43.7K
43,720
|
| Symphony ALU |
5,632
6,457
6,549
|
130
68
41
|
732K
732,160
439K
439,076
268K
268,509
|
| Condition Match |
11
|
5
|
55
|
| Objective Beauty |
32
|
9
|
288
|
| Divide |
3,107
|
191
|
593K
593,437
|
| Modulo |
2,914
|
191
|
556K
556,574
|
| Multiply |
568
1,664
1,800
|
97
35
34
|
55.0K
55,096
58.2K
58,240
61.2K
61,200
|
