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Cheddared
COMPLETE 63%

ARCHITECTURE LEVELS

LEVEL GATE DELAY CYCLE
IPC Instructions per cycle
ENERGY
Overture 1,838 163
25.0K 25,000
1.00
7.48B 7,489,850,000

PROGRAMMING LEVELS

LEVEL GATE DELAY CYCLE ENERGY
Nim
1.82B 1,828,737,909
106 20
3.87T 3,876,924,367,080
Random Number Generator
1.82B 1,828,737,909
106 520
100T 100,800,033,544,080
Delicious order
1.82B 1,828,737,909
106 1,926
373T 373,347,816,549,804
Capitalize
1.82B 1,828,737,909
106 710
137T 137,630,815,031,340
Tower of Hanoi
1.82B 1,828,737,909
106 1,074
208T 208,190,838,512,196

COMPONENT LEVELS

LEVEL GATE DELAY ENERGY
NOT Gate
1
1
1
XOR Gate
3
2
6
Adding Bytes
88
11
968
Signed Negator
27
8
216
Arithmetic Logic Unit (ALU) 2
225
14
3,150
Conditions
23
6
138
ASR
148
4
592
Symphony ALU
5,812
77
447K 447,524
Divide
1,244
118
146K 146,792