ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture | 1,608 | 176 |
25.0K
25,000
|
1.00 |
7.07B
7,075,200,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.1K
14,167
|
44 | 9 |
5.61M
5,610,132
|
| Mod 4 |
14.1K
14,167
|
44 | 5 |
3.11M
3,116,740
|
| Code Breaker |
14.1K
14,167
|
44 | 1,024 |
638M
638,308,352
|
| The Maze |
14.1K
14,167
|
44 | 2,437 |
1.51B
1,519,099,076
|
| Nim |
1.82B
1,828,735,990
|
109 | 14 |
2.79T
2,790,651,120,740
|
| Random Number Generator |
1.82B
1,828,735,990
|
109 | 585 |
116T
116,609,350,402,350
|
| Delicious order |
1.82B
1,828,735,990
|
109 | 1,387 |
276T
276,473,793,176,170
|
| Capitalize |
1.82B
1,828,735,990
|
109 | 1,059 |
211T
211,092,824,061,690
|
| Tower of Hanoi |
1.82B
1,828,735,990
|
109 | 1,025 |
204T
204,315,528,482,750
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
3
|
2
|
6
|
| Full Adder |
7
|
4
|
28
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
56
59
60
63
66
69
72
75
78
|
18
17
16
15
14
13
12
11
10
|
1,008
1,003
960
945
924
897
864
825
780
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
24
|
5
|
120
|
| Saving Bytes |
73
|
5
|
365
|
| Counter |
162
165
166
169
172
175
178
181
184
|
24
23
22
21
20
19
18
17
16
|
3,888
3,795
3,652
3,549
3,440
3,325
3,204
3,077
2,944
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
4
|
2
|
8
|
| 3 Bit Decoder |
14
|
3
|
42
|
| Little Box |
368
|
6
|
2,208
|
| Arithmetic Logic Unit (ALU) 1 |
116
|
4
|
464
|
| Arithmetic Logic Unit (ALU) 2 |
303
|
12
|
3,636
|
| Conditions |
13
|
7
|
91
|
| Punchcard Programming |
14.1K
14,140
|
41
|
579K
579,740
|
| Assembly Programming |
14.1K
14,140
|
41
|
579K
579,740
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
31
|
5
|
155
|
| Unsigned Less |
64
86
|
19
11
|
1,216
946
|
| Signed Less |
104
126
|
20
12
|
2,080
1,512
|
| LSR |
85
|
4
|
340
|
| Count leading zeroes |
24
29
|
6
5
|
144
145
|
| ASR |
99
|
4
|
396
|
| One hot encoding |
85
|
4
|
340
|
| Comparison Flags |
872
1,066
|
80
48
|
69.7K
69,760
51.1K
51,168
|
| Symphony ALU |
4,289
4,432
|
81
61
|
347K
347,409
270K
270,352
|
| Condition Match |
8
|
5
|
40
|
| Objective beauty |
28
|
8
|
224
|
| Divide |
1,646
|
260
|
427K
427,960
|
| Modulo |
1,679
|
262
|
439K
439,898
|
| Multiply |
520
674
|
55
31
|
28.6K
28,600
20.8K
20,894
|
