ARCHITECTURE LEVELS
| LEVEL | GATE | DELAY | CYCLE |
IPC
Instructions per cycle
|
ENERGY |
|---|---|---|---|---|---|
| Overture |
14.4K
14,428
|
41 |
25.0K
25,000
|
1.00 |
14.7B
14,788,700,000
|
PROGRAMMING LEVELS
| LEVEL | GATE | DELAY | CYCLE | ENERGY |
|---|---|---|---|---|
| Circumference |
14.4K
14,428
|
41 | 12 |
7.09M
7,098,576
|
| Mod 4 |
14.4K
14,428
|
41 | 5 |
2.95M
2,957,740
|
| Code Breaker |
14.4K
14,428
|
41 | 1,024 |
605M
605,745,152
|
| The Maze |
14.4K
14,428
|
41 | 2,206 |
1.30B
1,304,954,888
|
COMPONENT LEVELS
| LEVEL | GATE | DELAY | ENERGY |
|---|---|---|---|
| NOT Gate |
1
|
1
|
1
|
| XOR Gate |
3
|
2
|
6
|
| Bigger OR Gate |
2
|
2
|
4
|
| Bigger AND Gate |
2
|
2
|
4
|
| XNOR Gate |
3
|
2
|
6
|
| Half Adder |
4
|
2
|
8
|
| Full Adder |
11
|
4
|
44
|
| Bit Inverter |
3
|
2
|
6
|
| Byte NOT |
8
|
1
|
8
|
| Byte NAND |
8
|
1
|
8
|
| Adding Bytes |
128
|
10
|
1,280
|
| Multiplexer |
33
|
2
|
66
|
| Saving Gracefully |
10
|
5
|
50
|
| Signed Negator |
136
|
11
|
1,496
|
| Saving Bytes |
80
|
5
|
400
|
| Counter |
241
|
17
|
4,097
|
| 1 Bit Decoder |
1
|
1
|
1
|
| 2 Bit Decoder |
6
|
2
|
12
|
| Little Box |
400
|
6
|
2,400
|
| Arithmetic Logic Unit (ALU) 1 |
131
|
7
|
917
|
| Arithmetic Logic Unit (ALU) 2 |
461
|
25
|
11.5K
11,525
|
| Conditions |
13
|
7
|
91
|
| Punchcard Programming |
14.4K
14,428
|
41
|
591K
591,548
|
| Assembly Programming |
14.4K
14,428
|
41
|
591K
591,548
|
| Byte Constant |
0
|
0
|
0
|
| Byte XOR |
24
|
2
|
48
|
| Equality |
272
|
25
|
6,800
|
| Unsigned Less |
136
|
11
|
1,496
|
| Signed Less |
184
|
13
|
2,392
|
| LSR |
148
|
4
|
592
|
| Count leading zeroes |
527
|
43
|
22.6K
22,661
|
| ASR |
148
|
4
|
592
|
| One hot encoding |
148
|
4
|
592
|
| Comparison Flags |
2,506
|
52
|
130K
130,312
|
| Symphony ALU |
7,617
|
87
|
662K
662,679
|
| Condition Match |
8
|
5
|
40
|
| Objective beauty |
28
|
8
|
224
|
| Divide |
5,985
|
224
|
1.34M
1,340,640
|
| Modulo |
5,985
|
224
|
1.34M
1,340,640
|
| Multiply |
2,196
|
88
|
193K
193,248
|
